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11:10 - 11:30 Break (Coffee/Tee time)

11:30 - 12:10 (1) Need for High Performance Data Plane, Sujata Tibrewala, INTEL / (2) Cache Consistency - Requirements and its Packet Processing Performance Implications, Murthurajan Jayakumar, INTEL

Abstracts: (1) Session on how packet processing operations, header look ups, sanity checks, quality of service get translated onto CPU cycles and the performance considerations while implementing VNFs. (Speaker: Sujata Tibrewala) (2) Requirements and its Packet Processing Performance Implications: Session on how where the data is stored in your VNF effects the performance under the hood and what CPU architecture advances optimize them for faster packet processing and agile VNFs (Speaker: Muthurajan Jayakumar)  - Reference: IEEE SDN/NFV conference at Berlin

12:10 - 12:20 Discussion

Discussion of SIG-PMV milestones and deliverables; contributions from this meeting; future work

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